Title :
The interdependence of geometrical, thermal, and electrical limitations for VLSI logic
fDate :
2/1/1981 12:00:00 AM
Abstract :
With the trend towards further minimization, VLSI chips containing random logic will approach various fundamental limits. The interdependency of geometrical, thermal, and electrical effects is discussed, showing that a 1 cm/SUP 2/ chip is about equally limited by these three effects.
Keywords :
Integrated circuit technology; Integrated logic circuits; Large scale integration; integrated circuit technology; integrated logic circuits; large scale integration; Charge coupled devices; Fabrication; Logic circuits; MOSFETs; Silicon; Solid state circuits; Spectral analysis; Transversal filters; Very large scale integration; Wiring;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1981.1051536
