An MOS integrated circuit for digital filtering and level detection

An LSI circuit for digital signal processing has been designed and manufactured in 5 V n-channel MOS technology. Its main functions are to implement digital filters of the cascaded biquadratic form and to perform level detection operations. The frequency response of the filter is controlled by coefficients supplied from an external memory. The device, known by the acronym FAD (filter and detect), operates from a single-phase clock and can process up to 64000 samples/s at the maximum permissible clock rate of 2048 kbit/s. Although FAD was designed for one particular requirement, it has sufficient flexibility for use in a variety of application.