Title :
Choice of epitaxial silicon thickness for 1.5-μm CMOS SOS circuits
Author_Institution :
GEC Hirst Res. Centre, Wembley, UK
fDate :
1/1/1989 12:00:00 AM
Abstract :
An experimental study of the effects of epitaxial thickness on n- and p-channel silicon-on-sapphire (SOS) MOSFETs is reported. This study allows the optimum epitaxial silicon thickness for small-geometry (1-1.5 μm) transistors to be identified. Satisfactory performance of n- and p-channel MOSFETs can be obtained through the use of films 0.3-0.4 μm thick
Keywords :
CMOS integrated circuits; insulated gate field effect transistors; integrated circuit technology; semiconductor epitaxial layers; 1.5 micron; CMOS SOS circuits; SOS MOSFETs; Si-Al2O3; epitaxial thickness; n-channel MOSFETs; p-channel MOSFETs; Boron; Circuits; Fabrication; Implants; MOSFETs; Semiconductor films; Silicon; Substrates; Thin film transistors; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
