• DocumentCode
    891265
  • Title

    A 32-bit VLSI CPU chip

  • Author

    Beyers, Joseph W. ; Dohse, Louis J. ; Fucetola, Joseph P. ; Kochis, Richard L. ; Lob, Clifford G. ; Taylor, Gary L. ; Zeller, Eugene R.

  • Volume
    16
  • Issue
    5
  • fYear
    1981
  • Firstpage
    537
  • Lastpage
    542
  • Abstract
    A fully integrated 32-bit VLSI CPU chip utilizing 1 /spl mu/m features is described. It is fabricated in an n-channel silicon gate, self-aligned technology. The chip contains about 450000 transistors and executes microinstructions at approximately one per 55 ns clock cycle. It can execute a 32-bit binary integer add in 55 ns, a 32-bit binary integer multiply in 1.8 /spl mu/s, and a 64-bit floating point multiply in 10.4 /spl mu/s. The instruction set provides the functions of an advanced mainframe CPU. Because the implementation of such a complex device poses an organizational as well as a technical challenge, the design philosophy that was adopted is summarized briefly. Careful attention was paid to designer productivity, and design flexibility and testability.
  • Keywords
    Field effect integrated circuits; Large scale integration; Microprocessor chips; field effect integrated circuits; large scale integration; microprocessor chips; Central Processing Unit; Clocks; Costs; Productivity; Programmable logic arrays; Read only memory; System performance; Testing; Transistors; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1981.1051634
  • Filename
    1051634