DocumentCode
891512
Title
A low-voltage BiMOS op amp
Author
Schade, Otto H., Jr. ; Kramer, Erik J.
Volume
16
Issue
6
fYear
1981
Firstpage
661
Lastpage
668
Abstract
Describes the development of a threshold implanted BiMOS amplifier IC optimized for 2-5 V operation at a supply current of 300 /spl mu/A. A nonlinear operational transconductance amplifier (OTA) buffer having on-chip feedback provides a low-impedance rail-to-rail output, and a bulk-modulated PMOS input pair extends the common-mode range. Protective-network bootstrapping makes possible subpicoampere input-bias currents below 85/spl deg/C, and improved offset stability is achieved by the choice of threshold-level stage currents. Amplifier design is straightforward and readily applied from `micropower´ to `broad-band´ operating ranges. The combination of these features has produced a unique high-performance integrated circuit.
Keywords
Linear integrated circuits; Monolithic integrated circuits; Operational amplifiers; Wideband amplifiers; linear integrated circuits; monolithic integrated circuits; operational amplifiers; wideband amplifiers; Analog integrated circuits; Broadband amplifiers; Integrated circuit noise; Inverters; Low-noise amplifiers; Operational amplifiers; Rail to rail amplifiers; Rail to rail outputs; Semiconductor optical amplifiers; Solid state circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1981.1051659
Filename
1051659
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