Predicted insertion loss reductions achieved by implementing three-dimensional microoptical network in chip-scale optical interconnects

We simulate insertion loss reductions achieved by implementing three-dimensional (3-D) microoptical network in chip-scale optical interconnects using a model structure of 3-D microoptical switching system (3-D MOSS). 3-D MOSS for a 1024×1024 Banyan network consisting of stacked layers with embedded microoptical switches minimizes the insertion loss at a layer count of 16. The optimum is determined by balance of in-plane and vertical optical connections, whose losses change oppositely with the layer count, causing a tradeoff relationship. Loss induced by 25% waveguide misalignment is decreased to a level comparable to that for no misalignment by introducing self-organized lightwave network in the 3-D optical wiring. The remaining major losses arise from microoptical switches and microreflectors.