Title :
Calculation of Mean Shift for a Binary Multiplier Using 2, 3, or 4 Bits at a Time
Author :
Freeman, Herbert
Author_Institution :
Dept. of Elec. Engrg., New York University, Bronx, N. Y.
Abstract :
Binary multiplication can be speeded up by taking two or more bits of the multiplier at a time. This note describes an exact method, based on the use of a discrete-time, finite-state system model, for calculating the gain in multiplication speed resulting from such a scheme. It is shown that the gain in speed is less than what had previously been obtained using an approximation formula.
Keywords :
Adaptive signal detection; Algorithm design and analysis; Character recognition; Decision making; Information theory; Machine learning; Pattern recognition; Probability; Exact and approximate calculation; mean shift calculation; multiple-bit multiplication; multiplier state transition probabilities; speed of binary multiplications;
Journal_Title :
Electronic Computers, IEEE Transactions on
DOI :
10.1109/PGEC.1967.264752