DocumentCode
892258
Title
First-Order Modeling of Oxide-Isolated ISL
Author
Lohstroh, Jan ; Pluta, Rene M.
Volume
17
Issue
2
fYear
1982
fDate
4/1/1982 12:00:00 AM
Firstpage
305
Lastpage
311
Abstract
A model is derived for an oxide-isolated ISL gate with 3-μm minimum details and fan-out = 4. The model includes an n-p-n transistor, a p-n-p transistor, a silicon diode, and four Schottky-barrier diodes. Special attention is paid to all temperature coefficients of the device parameters. Very good agreement is obtained with measurements in the temperature range from 25 to 125°C. Due to the p+ channel-stopper in the process, the collector series resistance of the clamp p-n-p is relatively small.
Keywords
Bipolar integrated circuits; Integrated logic circuits; Large scale integration; Semiconductor device models; Clamps; Electrical resistance measurement; Laboratories; Ring oscillators; Schottky diodes; Semiconductor process modeling; Silicon; Temperature distribution; Temperature measurement; Very large scale integration;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1982.1051733
Filename
1051733
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