Title :
A 4-valued ECL encoder and decoder circuit
Author :
Brilman, Michel ; Etiemble, Daniel ; Oursel, J.L. ; Tatareau, Pierre
fDate :
6/1/1982 12:00:00 AM
Abstract :
The authors present the prototype of a 4-valued ECL encoder and decoder circuit that has been designed as a test chip for the realization of 4-valued cells to be used in interconnection networks. The hardware implementation of such a network in a SIMD or a MIMD computer architecture leads to a significant reduction of the number of wires. Static and dynamic characteristics are presented together with results on the propagation of 4-valued signals. Noise margins are compared for 2-valued and 4-valued versions.
Keywords :
Bipolar integrated circuits; Decoding; Emitter-coupled logic; Encoding; Integrated logic circuits; Many-valued logics; bipolar integrated circuits; decoding; emitter-coupled logic; encoding; integrated logic circuits; many-valued logics; Circuit noise; Circuit testing; Computer architecture; Decoding; Hardware; Integrated circuit interconnections; Multiprocessor interconnection networks; Prototypes; Voltage; Wires;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1982.1051773
