MAIL-a new Josephson logic family

A novel family of Josephson logic circuits called magnetically coupled asymmetric interferometer logic (MAIL) has been designed. The basic MAIL device is an asymmetric two-Josephson-junction interferometer. Computer simulations of OR/AND MAIL circuits using 2.5 μm Pb/Pb technology device models indicate an unloaded logic-gate delay of approximately 25 ps and a power dissipation of 5 μW/gate. Thus, the power-delay product is only 125 Atto J. Different MAIL logic gates have been tested experimentally, and preliminary results are presented.