Title :
Propagation delay times of ISL and STL
Author :
Lohstroh, Jan ; Pluta, René M.
fDate :
8/1/1982 12:00:00 AM
Abstract :
Propagation delay times of high-speed VLSI candidates ISL and STL are calculated analytically. It is shown by calculations and measurements that STL is marginally faster than ISL in oxide-isolated processes, at the cost of higher process complexity. Both logic forms suffer from speed degradation due to fan-in. Measures to obtain delay times that are independent of fan-in are discussed. Fan-out aspects are also considered. It is shown that ring oscillators exhibit a somewhat better speed than logic gates that start to switch from the DC state. This speed difference is expressed in an empirical formula.
Keywords :
Bipolar integrated circuits; Integrated logic circuits; Large scale integration; bipolar integrated circuits; integrated logic circuits; large scale integration; Costs; Current measurement; Electrical resistance measurement; Inverters; Logic arrays; Logic circuits; Propagation delay; Switches; Temperature; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1982.1051798