An enhanced 16K E/sup 2/PROM

An enhanced 16K E/SUP 2/PROM is described. It makes the E/SUP 2/PROM to microprocessor interface simple to implement. It frees up the system bus during e/SUP 2/PROM programming by latching addresses, data, and all control signals on chip. It provides minimum ERASE/WRITE, time via a novel feedback subsystem that monitors the amount of charge on the floating gate of the cell and signals to the system by the READY/BUSY output pin when enough charge has been added to or removed from the gate. With an external V/SUB pp/ voltage fixed supply, the E/SUP 2/PROM generates its own RC ramp during ERASE/WRITE, increasing the endurance of the storage cell. On-chip control circuitry provides ERASE before WRITE, making writing appear as a single step to the user.