Title :
A four-quadrant NMOS analog multiplier
Author :
Soo, David C. ; Meyer, Robert G.
Abstract :
A four-quadrant NMOS analog multiplier, which achieves linearity better than 0.3 percent at 75 percent of full-scale swing, a bandwidth of DC to 1.5 MHz, and output noise 77 dB below full scale is described. Active area is 450 mils/SUP 2/.
Keywords :
Field effect integrated circuits; Linear integrated circuits; Multiplying circuits; field effect integrated circuits; linear integrated circuits; multiplying circuits; Bandwidth; Circuit noise; Dynamic range; Filters; MOS devices; Operational amplifiers; Signal processing; Transfer functions; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1982.1051877
