Title :
A Single Chip Speech Synthesizer Using a Switched-Capacitor Multiplier
Author :
Gregorian, Roubik ; Amir, Gideon
Abstract :
A single chip speech synthesizer was designed using a switched-capacitor multiplier to implement the LPC algorithm. The chip contains the LPC-10 filter, 20 kbit ROM, all control logic, a three-pole switched-capacitor low-pass filter, and an audio amplifier capable of driving a speaker directly. The chip was fabricated in 5 µm CMOS technology and is 218 mils on the side.
Keywords :
Field effect integrated circuits; Large scale integration; Multiplying circuits; Speech synthesis; Switched capacitor networks; Bit rate; CMOS technology; Linear predictive coding; Low pass filters; Read only memory; Resonator filters; Silicon; Speech analysis; Speech synthesis; Synthesizers;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1983.1051900
