DocumentCode :
893904
Title :
A Single CMOS Speech Synthesis Chip and New Synthesis Techniques
Author :
Inoue, Kazuo ; Wakabayashi, Kenji ; Yoshikawa, Yoshinobu ; Masuzawa, Shigeaki ; Sano, Kenji ; Kimura, Seiji
Volume :
18
Issue :
1
fYear :
1983
Firstpage :
87
Lastpage :
90
Abstract :
A single CMOS speech synthesis LSI, organized as a special purpose microcomputer containing program ROM, RAM, 32K of speech data ROM, and a D/A converter is described in this paper. The chip utilizes new speech synthesis techniques to generate high quality speech, reproducing the natural inflection and intonation of the speaker, and has been used to produce speech at a bit rate of about 3 kbits/s.
Keywords :
Field effect integrated circuits; Large scale integration; Microprocessor chips; Special purpose computers; Speech synthesis; Data compression; Linear predictive coding; Microcomputers; Read only memory; Read-write memory; Signal processing algorithms; Signal synthesis; Speech analysis; Speech synthesis; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1983.1051903
Filename :
1051903
Link To Document :
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