DocumentCode
894725
Title
A 16K CMOS PROM with polysilicon fusible links
Author
Metzger, Larry R.
Volume
18
Issue
5
fYear
1983
Firstpage
562
Lastpage
567
Abstract
A 16K synchronous CMOS PROM with polysilicon fusible links and a 2K-word by 8-bit organization is described. The memory cell makes use of the vertical bipolar NPN that is inherent in the p-well CMOS process. An advanced polysilicon fuse process is used for the fusible links. The technology incorporates use of an epitaxial layer that eliminates latchup potential at programming voltages. A special verify mode is used to detect marginally blown fuses during programming. The design features a typical access time of 50 ns and 1-/spl mu/A standby current.
Keywords
Field effect integrated circuits; Integrated circuit technology; Integrated memory circuits; Large scale integration; PROM; field effect integrated circuits; integrated circuit technology; integrated memory circuits; large scale integration; CMOS process; CMOS technology; Current supplies; EPROM; Epitaxial layers; Equivalent circuits; Fuses; Material storage; PROM; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1983.1051994
Filename
1051994
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