DocumentCode
894824
Title
A novel NMOS E/sup 2/PROM scheme
Author
Fang, Sheng
Volume
18
Issue
5
fYear
1983
Firstpage
610
Lastpage
612
Abstract
A new NMOS E/SUP 2/PROM scheme is proposed by which the conventional erase-then-write two-step byte write operation can be realized in one step. Only those bits that do not match the data to be written will be inverted.
Keywords
Field effect integrated circuits; Integrated memory circuits; Large scale integration; PROM; field effect integrated circuits; integrated memory circuits; large scale integration; Capacitors; Charge pumps; Clocks; Impedance; Latches; Logic circuits; MOS devices; PROM; Tunneling; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1983.1052002
Filename
1052002
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