DocumentCode :
894975
Title :
A New ATPG Technique (ExpoTan) for Testing Analog Circuits
Author :
Varaprasad, B.K.S.V.L. ; Patnaik, L.M. ; Jamadagni, H.S. ; Agrawal, V.K.
Author_Institution :
Indian Space Res. Organ., Bangalore
Volume :
26
Issue :
1
fYear :
2007
Firstpage :
189
Lastpage :
196
Abstract :
In analog testing, usage of a single sinusoid as a test signal when compared to multitone signal, and fault detection with digital counting technique, facilitate the test implementation with simple built-in self-test hardware and make testing more cost effective. In this paper, a novel test-set-selection technique known as ExpoTan for testing linear-time-invariant (LTI) circuits is presented. The authors formulate the test generation problem with tan-1( ) and exponential functions for identification of a test signal with maximum fault coverage. For identification of a test signal the ExpoTan technique combines test generation and test-set-compaction tasks in a single phase and generates an efficient compacted test set. The experimental results show that the testing of LTI circuits using ExpoTan technique for the benchmark circuits achieves the required fault coverage with shorter testing time and test generation time
Keywords :
analogue circuits; automatic test pattern generation; built-in self test; fault simulation; ATPG technique; BIST; ExpoTan; LTI circuits; analog circuit testing; automatic test-pattern generation; built-in self-test hardware; exponential functions; fault coverage; fault detection; linear-time-invariant circuits; sinusoidal steady-state testing; test signal identification; test-set compaction; Analog circuits; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Signal detection; Signal generators; Signal processing; Analog built-in self-test (BIST); automatic test-pattern generation (ATPG); sinusoidal steady-state testing; test-set compaction;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2006.882596
Filename :
4039516
Link To Document :
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