A CCD time-integrating correlator

A CCD binary-analog time-integrating correlator has been designed and operated at 20 MHz clock rate. The 32-channel device is capable of integration periods in excess of 25 /spl mu/s or 500 clock periods, equivalent to a time-bandwidth product of 250. The device architecture is based on charge-domain signal processing for high-speed operation and does not required on-chip logic for storage of the binary reference. The device is tailored for weak signal applications, and a new charge skimming circuit has been devised which allows the small portion of the integrated charge containing the correlation function to be separated from the large register by tenfold. The correlator has a stationary pattern noise which can be eliminated with simple postprocessing, yielding a dynamic range of 67 dB.