Title :
CMOS implementation of nonlinear spectral-line timing recovery in digital data-communication systems
Author :
Moon, Un-Ku ; Huang, Gang
Author_Institution :
Sch. of Electr. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
Abstract :
In many of the digital communication systems where a form of passband modulation scheme is used, carrierless amplitude and phase modulation (CAP) or quadrature and amplitude modulation for example, the signal waveform does not contain a baud-rate spectral line. This paper describes analog and all-digital implementations of timing recovery using the nonlinear spectral-line method. The analog implementation of the timing-recovery integrated circuit was fabricated in 0.9-μm CMOS process and verified to meet all the requirements for a system utilizing the CAP modulation scheme, and initial results of the all-digital implementation confirm an even better performance that is process independent. The 51.84-MHz recovered clock allows the receiver to achieve better than a 10-10 bit-error rate (BER).
Keywords :
CMOS analogue integrated circuits; CMOS digital integrated circuits; digital communication; digital phase locked loops; quadrature amplitude modulation; synchronisation; timing jitter; transfer functions; voltage-controlled oscillators; CMOS implementation; PLL; all-digital implementations; analog implementations; automatic tuning; bit-error rate; carrierless amplitude and phase modulation; digital data-communication systems; jitter transfer function; nonlinear spectral-line timing recovery; passband modulation scheme; quadrature and amplitude modulation; voltage controlled crystal oscillator; Amplitude modulation; Analog integrated circuits; Bit error rate; CMOS analog integrated circuits; CMOS integrated circuits; Digital communication; Digital modulation; Passband; Phase modulation; Timing;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2003.822395