Title :
A three-dimensional CMOS design methodology
Author :
Hoefflinger, Bernd ; Liu, Sie T. ; Vajdic, Branislav
Abstract :
A technology-updatable design methodology for three-dimensional CMOS circuits has been developed. Four levels of abstraction have been implemented with topographical congruence: (1) technology level, (2) mask level, (3) transistor level, and (4) logic level. A novel transistor-level symbolic representation is introduced which emphasizes the three-dimensional nature of the circuits. A number of design examples are presented.
Keywords :
Circuit CAD; circuit CAD; Acoustical engineering; CMOS technology; Design engineering; Design methodology; Electrical engineering; Inverters; Isolation technology; Logic circuits; Silicon on insulator technology; Thin film transistors;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1984.1052082
