DocumentCode
895874
Title
Concurrent error detection and correction in real-time systolic sorting arrays
Author
Kuo, Sy-Yen ; Liang, Sheng-Chiech
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
41
Issue
12
fYear
1992
fDate
12/1/1992 12:00:00 AM
Firstpage
1615
Lastpage
1620
Abstract
A novel approach to online error detection and correction for high-throughput VLSI sorting arrays is presented. The error model is defined at the sorting element level and both functional errors and data errors are considered. Functional errors are detected and corrected by exploiting inherent properties as well as newly discovered special properties of the sorting array. Coding techniques are used to locate data errors. All the checkers are designed to be totally self-checking and hence the sorting array is highly reliable. Two-level pipelining is employed, making the design very efficient and suitable for real-time application. The structure is very regular and therefore is very attractive for VLSI or WSI implementation
Keywords
VLSI; error correction codes; error detection codes; parallel algorithms; real-time systems; sorting; systolic arrays; VLSI sorting arrays; WSI; concurrent error correction; concurrent error detection; data errors; functional errors; high-throughput; online error correction; online error detection; real-time systolic sorting arrays; self-checking; two level pipelining; Availability; Circuit faults; Computer errors; Costs; Error correction; Fault tolerance; Redundancy; Sorting; Very large scale integration; Wiring;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.214672
Filename
214672
Link To Document