• DocumentCode
    895990
  • Title

    Architectures for exponentiation over GD(2n) adopted for smartcard application

  • Author

    Arazi, Benjamin

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Ben Gurion Univ., Beer Sheva, Israel
  • Volume
    42
  • Issue
    4
  • fYear
    1993
  • fDate
    4/1/1993 12:00:00 AM
  • Firstpage
    494
  • Lastpage
    497
  • Abstract
    Two exponentiation circuits are proposed. Using the fact that squaring is a linear operation over GF(2n), a time-space tradeoff in smartcard-based circuitry is presented. It is shown how multiplication is performed by a single shift, based on replacing the public key αa ∈ GF(2n) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated
  • Keywords
    cryptography; digital arithmetic; smart cards; dynamic shift registers; exponentiation circuits; linear operation; public key; smartcard-based circuitry; structure regularity; time-space tradeoff; Arithmetic; Circuits; Clocks; Galois fields; Hardware; Polynomials; Public key; Public key cryptography; Shift registers; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.214694
  • Filename
    214694
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=895990