• DocumentCode
    896264
  • Title

    Tunneling and thermal emission of electrons from a distribution of deep traps in SiO2 [nMOSFET]

  • Author

    Hwang, Nam ; Or, Burnette S S ; Forbes, Leonard

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
  • Volume
    40
  • Issue
    6
  • fYear
    1993
  • fDate
    6/1/1993 12:00:00 AM
  • Firstpage
    1100
  • Lastpage
    1103
  • Abstract
    Both field-induced, or tunneling, and thermal emission of electrons from deep traps in the gate oxides on n-channel LDD CMOS devices have been observed and characterized. Experimental results show that the deep trapping effects at room temperature are similar to the shallow-level trapping effects observed by others below room temperature. In this case, however, the time constants involved are very long. This model and physical mechanisms can explain the apparent saturation observed under AC stress conditions, and also the differences observed between AC use conditions and DC stress
  • Keywords
    deep levels; hot carriers; insulated gate field effect transistors; semiconductor device models; tunnelling; AC stress conditions; DC stress; Si-SiO2; apparent saturation; deep traps; field induced electron emission; gate oxides; hot electrons; model; n-channel LDD CMOS devices; physical mechanisms; thermal electron emission; time constants; tunneling; Electrical capacitance tomography; Electron emission; Electron traps; Low voltage; MOSFET circuits; Temperature; Testing; Thermal degradation; Thermal stresses; Tunneling;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.214735
  • Filename
    214735