Author :
Paffrath, L. ; Bertolucci, B. ; Deiss, S. ; Gustavson, D. ; Holmes, T. ; Horelick, D. ; Larsen, R. ; Logg, C. ; Walz, H. ; Barsotti, E. ; Larwill, M. ; Lagerlund, T. ; Pordes, R. ; Taff, L. ; Brown, R. ; Downing, R. ; Haney, M. ; Jackson, B. ; Lesny, D. ;
Abstract :
This paper will provide a demonstration of basic FASTBUS hardware and test software. The systems will include single crate segments, simple computer I/O, a fast sequencer and memory, some simple diagnostic and display devices and a UNIBUS to FASTBUS processor interface. The equipment will be set up to show the basic FASTBUS protocols and timing transactions, as well as some of the general initialization software features.
