Title :
A high performance 1 Mbit EPROM
Author :
Kanauchi, Shushi ; Ichida, Kenji ; Okumura, Koichiro ; Ohya, Shuichi ; Watanabe, Takeshi ; Shimamura, Yoshihiro ; Kikuchi, Masanori
Abstract :
A high-performance 1-Mb EPROM has been developed by utilizing advanced 1.2-/spl mu/m minimum design rule technology. The device technology used is n-channel E/D MOS. The memory cell size is 5.5/spl times/7.5 /spl mu/m and the die size is 9.4/spl times/7.2 mm. The word organization is changeable between 64K words/spl times/16 bits and 128K words/spl times/8 bits. The active power dissipation is 500 mW and the standby power dissipation is 150 mW. The access time is typically 200 ns. The programming voltage is 12-14 V and the programming pulse width is typically 1 ms/word. In order to realize such a high-density, high-speed, low power 1-Mb EPROM, 1.2-/spl mu/m minimum patterning process technology, a high-speed sense amplifier, and a high-speed decoder are used.
Keywords :
Field effect integrated circuits; Integrated memory circuits; PROM; field effect integrated circuits; integrated memory circuits; Circuits; Decoding; EPROM; High power amplifiers; Microprocessors; Nonvolatile memory; Power dissipation; Pulse amplifiers; Space vector pulse width modulation; Threshold voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1984.1052203
