Title :
An 80 ns 1 Mbit MASK ROM with a new memory cell
Author :
Masuoka, Fujio ; Ariizumi, Shoji ; Iwase, Taira ; Ono, Michihiro ; Endo, Norio
Abstract :
A high-speed 1-Mb MASK ROM incorporating a new through-hole programmed memory cell, named THOLE CELL, and a full CMOS static sense amplifier is described. The ROM has been fabricated using a double-polysilicon p-well CMOS technology. As a result of achieving a compact ROM cell that is as small as 5.2-/spl times/6.4 /spl mu/m/SUP 2/, even with relatively conservative 2.0 /spl mu/m design rules, a small die size of 7.08/spl times/7.7 mm/SUP 2/ is realized. The ROM organization is 128K/spl times/8 bit and has a typical access time of 80 ns. A typical active current of 8 mA is achieved, in spite of the fully static system. This ROM offers high speed and low power characteristics, while achieving small die size and short turnaround time.
Keywords :
CMOS integrated circuits; Integrated memory circuits; Read-only storage; integrated memory circuits; read-only storage; Automation; CMOS technology; Character generation; Circuit synthesis; Implants; Negative feedback; Process design; Read only memory; Silicon; Standby generators;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1984.1052204