Abstract :
The MicroVAX 32, a single-chip, 32-bit microprocessor, is described. Implemented in 3-μm (drawn) dual aluminium NMOS, the MicroVAX 32 features a VAX compatible programming architecture and instruction set, and on-chip demand paged virtual memory management. Its key innovations are a repartitioning of the VAX architecture, which optimizes chip size without degrading performance, and a simplified hardware architecture with similar benefits. The chip contains 125000 transistor sites, is 8.7×8.6 mm in size, and dissipates 3 W of power worst-case.
