An MOS four-quadrant analog multiplier based on the multitail technique using a quadritail cell as a multiplier core

An MOS four-quadrant analog multiplier using a quadritail cell as a multiplier core is presented. A quadritail cell operates as a multiplier core by adding proper combinations of the two input voltages to the individual gates of the four transistors in the core, and also, there are numerous combinations of the two input voltages for a quadritail cell to properly multiply the two input voltages. But all MOS multipliers using a quadritail cell with the proper added combinations of the two input voltages usually possess transfer characteristics equivalent to those of the multiplier proposed by Bult and Wallinga (1986) and by Bult (rediscovered by Wang (1991)). An input system for the MOS multiplier core can, of course, be realized by active devices and also by resistive dividers, if all the added inputs are positive-combinations. The proposed multiplication circuitry is widely useful since it Is operable on low voltage and can be simply implemented with n-channel MOS transistors and resistors in MOS technology