Title :
Custom LSI/VLSI chip design productivity
fDate :
4/1/1985 12:00:00 AM
Abstract :
A description is given of an eight-parameter empirical model for determining design manpower for full custom digital LSI/VLSI (not standard cell or polycell). The model estimates design manpower from six generally available design characteristics. It fits the data from five different organizations with an average absolute error of 10%. Both merchant market suppliers an in-house captives are included in the sample.
Keywords :
Digital integrated circuits; Field effect integrated circuits; Integrated circuit technology; Large scale integration; VLSI; digital integrated circuits; field effect integrated circuits; integrated circuit technology; large scale integration; Chip scale packaging; Costs; Design methodology; Investments; Job shop scheduling; Large scale integration; Logic design; Power generation economics; Productivity; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1985.1052343
