DocumentCode
898474
Title
A 3-/spl mu/m CMOS Digital Codec with Programmable Echo Cancellation and Gain Setting
Author
Defraeye, Paul ; Rabaey, Dirk ; Roggeman, Wim ; Yde, Johan ; Kiss, Lajos
Volume
20
Issue
3
fYear
1985
fDate
6/1/1985 12:00:00 AM
Firstpage
679
Lastpage
687
Abstract
A 3-/spl mu/m CMOS digital signal processor (DSP) performs speech signal shaping, programmable echo cancellation and gain setting functions for telephone applications. A/D and D/A conversions are performed by making use of /spl Sigma//Spl Delta/ modulators, decimator, and interpolator filter blocks. In addition, the DSP acts as a control interface between the subscriber line interface circuit (SLIC) and the line card controller, the denouncing of eight line status bits included.
Keywords
CMOS integrated circuits; Codecs; Digital integrated circuits; Echo suppression; Signal processing; Telephone equipment; CMOS process; Codecs; Delta modulation; Digital signal processing; Digital signal processors; Echo cancellers; Performance gain; Signal processing; Speech processing; Telephony;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1985.1052368
Filename
1052368
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