Title :
A generalization of the single b-Bit byte error correcting and double bit error detecting codes for high-speed memory systems
Author :
Xiao, Sihai ; Shi, Xiaofa ; Feng, Guiliang ; Rao, T.R.N.
Author_Institution :
Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
fDate :
4/1/1996 12:00:00 AM
Abstract :
In this paper, a general method using the subsets (generating sets) of GF(2b) for constructing the SbEC-DED codes will be presented. The constructions given in Fujiwara and Hamada (1992) are special cases of ours. For some values of b, the generating sets used in our constructions are larger than the cosets used in Fujiwara and Hamada (1992). Hence, a larger code length can be obtained
Keywords :
error correction codes; error detection codes; fault tolerant computing; memory architecture; SbEC-DED codes; b-Bit byte error correcting; code length; double bit error detecting codes; generalization; high-speed memory systems; Application software; Computer errors; Conductors; Error correction codes; Galois fields; Parity check codes; Polynomials;
Journal_Title :
Computers, IEEE Transactions on
