DocumentCode
899122
Title
A 32-bit VLSI digital signal processor
Author
Hayes, W.P. ; Kershaw, Robert N. ; Bays, Laurence E. ; Boddie, James R. ; Fields, Evelyn M. ; Freyman, Ronald L. ; Garen, Craig J. ; Hartung, John ; Klinikowski, James J. ; Miller, Charles R. ; Mondal, Kalyan ; Moscovitz, Howard S. ; Rotblum, Yehuda ; Sto
Volume
20
Issue
5
fYear
1985
Firstpage
998
Lastpage
1004
Abstract
A general-purpose programmable digital signal processor (DSP) has been implemented in 1.5-/spl mu/m (L/SUB eff/) NMOS technology using full-custom circuit design for high performance. The DSP has a 32-bit instruction set, 32-bit data path, and full-hardware 32-bit floating-point arithmetic. The architecture is described section by section, and an overview of the instruction set is presented. The extensive design verification process applied to the DSP is also described.
Keywords
Computerised signal processing; Field effect integrated circuits; Microprocessor chips; VLSI; computerised signal processing; field effect integrated circuits; microprocessor chips; Application software; Circuit synthesis; Digital signal processing; Digital signal processors; Filters; Floating-point arithmetic; MOS devices; Process design; Registers; Very large scale integration;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1985.1052427
Filename
1052427
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