DocumentCode :
899180
Title :
Threshold voltage based CMOS voltage reference
Author :
Dai, Y. ; Comer, D.T. ; Comer, D.J. ; Petrie, C.S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA
Volume :
151
Issue :
1
fYear :
2004
Firstpage :
58
Lastpage :
62
Abstract :
The paper describes a CMOS voltage reference design that uses the temperature dependence of NMOS and PMOS threshold voltages to form a temperature-insensitive reference. No diodes or parasitic bipolar transistors are used. The circuit architecture accommodates a wide range of output voltages. A test chip is fabricated using a 0.5 μm CMOS process. The prototype achieves a temperature coefficient of 32 ppm/°C for a temperature range of -10°C to 80°C and a supply voltage sensitivity of 10 mV/V.
Keywords :
CMOS analogue integrated circuits; operational amplifiers; reference circuits; 10 to 80 C; CMOS voltage reference; NMOS devices; PMOS devices; circuit architecture; folded cascode amplifier; long-channel devices; supply voltage sensitivity; temperature dependence; temperature-insensitive reference; threshold voltage based reference;
fLanguage :
English
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2409
Type :
jour
DOI :
10.1049/ip-cds:20040217
Filename :
1267685
Link To Document :
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