Title :
An 8-MHz CMOS subranging 8-bit A/D converter
Author :
Dingwall, Andrew G F ; Zazzu, Victor
Abstract :
A 8-bit subranging converter (ADC) has been realized in a 3-/spl mu/m silicon gate, double-polysilicon capacitor CMOS process. The ADC uses 31 comparators and is capable of conversion rates to 8 MHz at V/SUB DD/=5 V. Die size is 3.2/spl times/2.2 mm/SUP 2/.
Keywords :
Analogue-digital conversion; CMOS integrated circuits; analogue-digital conversion; CMOS logic circuits; CMOS process; Capacitors; Clocks; Costs; Digital signal processing; Linearity; Power dissipation; Silicon; Throughput;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1985.1052451
