• DocumentCode
    899818
  • Title

    A new systolic realization for the discrete Fourier transform

  • Author

    Kar, Dulal C. ; Rao, V. V Bapeswara

  • Author_Institution
    Dept. of Electr. Eng., North Dakota State Univ., Fargo, ND, USA
  • Volume
    41
  • Issue
    5
  • fYear
    1993
  • fDate
    5/1/1993 12:00:00 AM
  • Firstpage
    2008
  • Lastpage
    2010
  • Abstract
    A systolic array for the discrete Fourier transform (DFT) is proposed. In comparison with previous schemes, the proposed scheme reduces the number of multipliers required almost by half and thus saves a considerable amount of hardware
  • Keywords
    fast Fourier transforms; systolic arrays; discrete Fourier transform; multipliers; systolic array; systolic realization; Array signal processing; Discrete Fourier transforms; Noise generators; Optimized production technology; Polynomials; Signal processing; Signal processing algorithms; Speech processing; Systolic arrays; Time frequency analysis;
  • fLanguage
    English
  • Journal_Title
    Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1053-587X
  • Type

    jour

  • DOI
    10.1109/78.215326
  • Filename
    215326
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=899818