• DocumentCode
    900158
  • Title

    Deductive fault simulation for sequential module circuits

  • Author

    Walczak, Krzysztof

  • Author_Institution
    Inst. of Comput. Sci., Tech. Univ. of Warsaw, Poland
  • Volume
    37
  • Issue
    2
  • fYear
    1988
  • fDate
    2/1/1988 12:00:00 AM
  • Firstpage
    237
  • Lastpage
    239
  • Abstract
    A cost-effective method is presented for the deductive simulation of fault effects propagating through sequential functional modules that are described by the state-diagram representation of a Moore or Mealy automaton. The cornerstone of the method is a novel definition of the internal fault list of a sequential module. The method can be particularly useful for sequential modules when the state assignment and the gate-level realization are unknown
  • Keywords
    failure analysis; finite automata; logic testing; sequential circuits; state-space methods; Mealy automaton; Moore automaton; deductive fault simulation; internal fault list; sequential functional modules; state-diagram representation; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer networks; Fault tolerance; Integrated circuit interconnections; Multiprocessing systems; Multiprocessor interconnection networks; Network topology;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.2155
  • Filename
    2155