Title :
Minimum switching energy limited by thermal noise calculated for IC´s with internal distribution of inverters threshold voltage
Author :
Jakubowski, Andrzej ; Cetner, Arkadiusz
fDate :
4/1/1986 12:00:00 AM
Abstract :
The authors prove that for any arbitrarily chosen digital IC with an internal distribution of the inverter threshold voltage, the minimum energy dissipated per logical operation limited by thermal noise-induced error rate will be several times greater than in an idealized IC (with the threshold voltage equal exactly to half the supply voltage). Basic assumptions are taken from K.U. Stein´s (1977) work. More general foundations have, on the other hand, been adopted as applicable to the inverter threshold voltage distribution inside an IC. The effect the threshold voltage-supply voltage ratio has on the minimum switching energy was analysed. This ratio has been identified as parameter `a´.
Keywords :
Digital integrated circuits; Large scale integration; digital integrated circuits; large scale integration; Appropriate technology; Digital integrated circuits; Energy measurement; Error analysis; Integrated circuit noise; Inverters; Logic; Probability density function; Thermodynamics; Threshold voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1986.1052529