Title :
Low-Power CMOS Rectifier Design for RFID Applications
Author :
Mandal, Soumyajit ; Sarpeshkar, Rahul
Author_Institution :
Massachusetts Inst. of Technol., Cambridge
fDate :
6/1/2007 12:00:00 AM
Abstract :
We investigate theoretical and practical aspects of the design of far-field RF power extraction systems consisting of antennas, impedance matching networks and rectifiers. Fundamental physical relationships that link the operating bandwidth and range are related to technology dependent quantities like threshold voltage and parasitic capacitances. This allows us to design efficient planar antennas, coupled resonator impedance matching networks and low-power rectifiers in standard CMOS technologies (0.5-mum and 0.18-mum) and accurately predict their performance. Experimental results from a prototype power extraction system that operates around 950 MHz and integrates these components together are presented. Our measured RF power-up threshold (in 0.18-mum, at 1 muW load) was 6 muWplusmn10%, closely matching the predicted value of 5.2 muW.
Keywords :
CMOS analogue integrated circuits; impedance matching; integrated circuit design; low-power electronics; planar antennas; radiofrequency identification; radiofrequency integrated circuits; rectennas; rectifying circuits; CMOS analog integrated circuits; RF power-up threshold; RFID applications; coupled resonator; far-field RF power extraction system; impedance matching networks; low-power CMOS rectifier design; parasitic capacitances; planar antennas; size 0.18 mum; size 0.5 mum; Antenna theory; Bandwidth; CMOS technology; Impedance matching; Parasitic capacitance; Planar arrays; Radio frequency; Radiofrequency identification; Rectifiers; Threshold voltage; Antennas; CMOS analog integrated circuits; circuit theory; rectifiers;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2007.895229
