Author :
Chao, Hu H. ; Ong, Shauchi ; Tsai, Mon Yen ; Shih, Feng-hsien W. ; Hou, John C L ; Lewis, Kelvin W. ; Tang, Jeffrey Y -F ; Trempel, Cynthia A. ; Hadsell, Richard W. ; Yu, Hwa Nien ; Greier, Paul F. ; Franch, Robert L. ; McCormick, P.E. ; Davis, Clinton V.
Abstract :
A 32-bit single-chip microprocessor is described that directly implements 102 System/370 instructions and supports the emulation of the rest of the instructions. It is fabricated using a 2-μm polysilicon-gate NMOS technology with two levels of aluminium. The chip is 10×10 mm/SUP 2/ with 200000 transistor sites. It is designed for a 10-MHz clock at worst case and has been operated at 18 MHz with a 3-W power dissipation. The design and verification methodologies and the testing consideration are also described.
