• DocumentCode
    901105
  • Title

    A 32-bit microprocessor for Smalltalk

  • Author

    Pendleton, Joan M. ; Kong, Shing I. ; Brown, Emil W. ; Dunlap, Frank ; Marino, Christopher ; Ungar, David M. ; Patterson, David A. ; Hodges, David A.

  • Volume
    21
  • Issue
    5
  • fYear
    1986
  • fDate
    10/1/1986 12:00:00 AM
  • Firstpage
    741
  • Lastpage
    749
  • Abstract
    SOAR (Smalltalk on a RISC), a 32-bit microprocessor designed for the efficient execution of compiled Smalltalk, is described. The chip, implemented in 4-μm single-level metal NMOS technologies, has a cycle time of 400 ns. Pipelining allows an instruction to start each cycle with the exception of loads and stores. The processor contains 35700 transistors, is 320×432 mil, dissipates 3 W, and is assembled in an 84-lead pin grid array package. A design methodology that included a large CAD effort and provided functioning chips on first silicon was used. The SOAR hardware environment is a SUN workstation that includes a custom SOAR board and extra memory.
  • Keywords
    Field effect integrated circuits; Microprocessor chips; Pipeline processing; field effect integrated circuits; microprocessor chips; pipeline processing; Assembly; Design automation; Design methodology; Electronics packaging; Hardware; MOS devices; Microprocessors; Pipeline processing; Reduced instruction set computing; Silicon;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1986.1052603
  • Filename
    1052603