DocumentCode :
902127
Title :
Compilation of standard-cell libraries
Author :
Martinez, Antonio M. ; Dholakia, Suresh ; Bush, Steve
Volume :
22
Issue :
2
fYear :
1987
fDate :
4/1/1987 12:00:00 AM
Firstpage :
190
Lastpage :
197
Abstract :
The compilation approach used to generate and verify a complete standard-cell library is presented. Each standard cell is comprised of layout, a behavioral model, and documentation. The tradeoffs are described and this approach is compared to traditional methods. This approach allows rapid generation of complete libraries regardless of technology. Furthermore, improvements and fixes are rapidly incorporated into an entire library. Over 280 standard cells were created by five people in nine months.
Keywords :
Circuit CAD; Integrated circuit technology; Logic CAD; circuit CAD; integrated circuit technology; logic CAD; Automation; CMOS technology; Circuit simulation; Documentation; Logic; Process design; Silicon compiler; Software libraries; Standards development; Writing;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1987.1052701
Filename :
1052701
Link To Document :
بازگشت