DocumentCode
902162
Title
CMOS differential pass-transistor logic design
Author
Pasternak, John H. ; Shubat, Alex S. ; Salama, C. Andre T
Volume
22
Issue
2
fYear
1987
fDate
4/1/1987 12:00:00 AM
Firstpage
216
Lastpage
222
Abstract
This logic technique offers greater area efficiency, higher speeds of operation, and simpler design algorithms than conventional CMOS pass-transistor logic. Experimental results and the automated techniques used in implementing efficient pass-transistor layouts are presented. The application of CMOS differential pass-transistor logic design in custom applications is also discussed.
Keywords
CMOS integrated circuits; Circuit layout CAD; Integrated logic circuits; Logic CAD; circuit layout CAD; integrated logic circuits; logic CAD; Algorithm design and analysis; CMOS logic circuits; CMOS technology; Clocks; Logic design; Logic gates; MOS devices; Multiplexing; Switches; Threshold voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1987.1052705
Filename
1052705
Link To Document