Fourth-order two-stage delta-sigma modulator using both 1 bit and multibit quantisers

A fourth-order delta-sigma modulator is proposed as a cascade of two second-order stages. In the first stage, a 1 bit quantiser is employed, and in the second stage, a multibit quantiser is employed. The new modulator is tolerant of the multibit D/A conversion error and thus can deliver a very high signal-to-noise ratio in the baseband. Another significant advantage of using the new modulator is the reduced requirement on the following digital filter as associated with multibit modulators.