A 4-Mbit CMOS EPROM

A high-density (512K-word×8-b) erasable programmable read-only memory (EPROM) has been designed and fabricated by using 0.8-μm n-well CMOS technology. A novel chip layout and a sense-amplifier circuit produce a 120-ns access time and a 4-mA operational supply current. The interpoly dielectric, composed of a triple-layer structure, realizes a 10-μs/byte fast programming time, in spite of scaling the programming voltage V/SUB PP/ from 12.5 V for a 1-Mb EPROM to 10.5 V for this 4-Mb EPROM. To meet the increasing demand for a one-time programmable (OTP) ROM, a circuit is implemented to monitor the access time after the assembly. A novel redundancy scheme is incorporated to reduce additional tests after the laser fuse programming. Cell size and chip size are 3.1×2.9 μm/SUP 2/ and 5.86×14.92 mm/SUP 2/, respectively.