Title :
MOS analog function synthesis
Author :
Fattaruso, John W. ; Meyer, Robert G.
fDate :
12/1/1987 12:00:00 AM
Abstract :
The design of a monolithic MOS parametric analog function synthesizer is described. The contour and voltage scaling of the nonlinear function to be synthesized are determined by a set of input bias voltage parameters, and are independent of temperature and processing variations. Experimental results showing synthesis precision on the order of 2% over temperature are presented. The particular application of generating a voltage that is a nonlinear function of chip temperature for compensation purposes is addressed.
Keywords :
Compensation; Field effect integrated circuits; Function generators; compensation; field effect integrated circuits; function generators; Analog circuits; Circuit synthesis; Frequency conversion; Impedance; Linear circuits; Operational amplifiers; Signal synthesis; Synthesizers; Temperature dependence; Voltage control;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1987.1052855
