DocumentCode
9039
Title
Multiple Signal Detection Digital Wideband Receiver using Hardware Accelerators
Author
George, Kenny ; Chen, Chien-In Henry
Author_Institution
Comput. Eng. Program, California State Univ., Fullerton, CA, USA
Volume
49
Issue
2
fYear
2013
fDate
Apr-13
Firstpage
706
Lastpage
715
Abstract
A three gigasample per second (GSPS) digital wideband receiver that operates in a 1.25-GHz instantaneous bandwidth (IBW) is proposed. In addition to building such systems, offloading of computation-intensive tasks to a combination of specialized hardware accelerators such as graphics processing units (GPUs) and field-programmable gate arrays (FPGAs) to increase the overall receiver´s dynamic performance is analyzed. The receiver detects up to 15 signals with a maximum attainable instantaneous dynamic range (IDR) of 62.5 dB before the next set of data arrives for processing.
Keywords
graphics processing units; radio receivers; signal detection; computation-intensive tasks; digital wideband receiver; frequency 1.25 GHz; gigasample per second; graphics processing units; hardware accelerators; instantaneous bandwidth; multiple signal detection; offloading;
fLanguage
English
Journal_Title
Aerospace and Electronic Systems, IEEE Transactions on
Publisher
ieee
ISSN
0018-9251
Type
jour
DOI
10.1109/TAES.2013.6494375
Filename
6494375
Link To Document