DocumentCode
904212
Title
A surface-charge random-access memory system
Author
Engeler, William E. ; Tiemann, Jerome J. ; Baertsch, Richard D.
Volume
7
Issue
5
fYear
1972
Firstpage
330
Lastpage
335
Abstract
The authors present a surface-charge storage cell suitable for word-organized dynamic random-access memory and discuss its operation in a memory system. Experimental results and computer simulations of the readout process on a 4/spl times/8 array using this cell are given. A sensitive stable sense-and-refresh amplifier, suitable for use with this memory cell is also described. Simulations of a 4096-bit chip with a storage cell density of 2.5 mils/SUP 2//bit using this refresh amplifier predict a cycle time of 250 ns.
Keywords
Amplifiers; Random-access storage; Semiconductor storage devices; Semiconductor storage systems; amplifiers; random-access storage; semiconductor storage devices; semiconductor storage systems; Charge transfer; Computational modeling; Computer simulation; Electrodes; Predictive models; Random access memory; Read-write memory; Shift registers; Signal processing;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1972.1052888
Filename
1052888
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