DocumentCode :
904229
Title :
Merged-transistor logic (MTL)-a low-cost bipolar logic concept
Author :
Berger, Horst H. ; Wiedmann, Siegfried K.
Volume :
7
Issue :
5
fYear :
1972
fDate :
10/1/1972 12:00:00 AM
Firstpage :
340
Lastpage :
346
Abstract :
The authors describe a novel bipolar logic featuring a direct injection of minority carriers into the switching transistor. MTL is based on inverters having decoupled multicollector outputs for the logical combinations. The devices are self-isolated and no ohmic load resistors are required. This is a key to monolithic logic chips of very high functional density and low power dissipation. On experimental chips an excellent power-delay product of 0.35 pJ has been measured. These experiments show that a density of 100 gates/mm/SUP 2/ can be achieved with present manufacturing tolerances (minimum dimensions: 0.3-mil metal line width, 0.15-mil spacing, 0.2×0.2-mil/SUP 2/ contact holes).
Keywords :
Digital integrated circuits; Integrated circuits; Logic circuits; Monolithic integrated circuits; digital integrated circuits; integrated circuits; logic circuits; monolithic integrated circuits; Current supplies; Decoding; Logic circuits; Logic devices; Manufacturing; Random access memory; Resistors; Semiconductor device measurement; Semiconductor memory; Solid state circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1972.1052890
Filename :
1052890
Link To Document :
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