DocumentCode
904335
Title
High-speed iterative multiplier
Author
Burton, D.P. ; Noaks, D.R.
Author_Institution
University of Birmingham, Department of Electronic & Electrical Engineering, Birmingham, UK
Volume
4
Issue
13
fYear
1968
Firstpage
262
Abstract
An iterative array is proposed which reduces the multiplication of two binary numbers to one pass through the array and a summation of the outputs produced.
Keywords
circuits and sub-assemblies; logic and computing circuits; switching systems;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19680200
Filename
4233446
Link To Document